No, you are mistaken. But this is a very common misunderstanding.
Every modern multi-core processor has hardware cache consistency . L1 and similar caches are invisible. The processor cache, such as the L1 cache, has nothing to do with memory visibility.
Changes are visible immediately when a thread changes a process resource. The problem is optimization, which does not allow changing the process resources in the exact order in which the code is indicated.
If your code has k = j; i = 4; if (j == 2) foo(); k = j; i = 4; if (j == 2) foo(); , the optimizer can see that your first assignment reads the value of j . Therefore, perhaps he would not read it again when you compare it to 2 , since he “knows” that he cannot change. However, another thread may have changed it. Thus, some kinds of optimization should be turned off when synchronization between threads is required. What do things like volatile .
If compilers and processors did not make optimizations and executed the program exactly as it was written, volatile will never be needed. Memory monitoring is code optimization (some of them are executed by the compiler, some by the processor), but not cached.
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