Difference between Preemption and Context Switch

Little introduction

I am currently writing a small (readable tiny) RTOS kernel, and it should be monolithic with most things in the kernel. However, I cannot find much information about a few things listed below. It would be very useful, and in addition, this is not some kind of university project, but what I do of my own free will.

The best alternative to answer all the questions would be if you could refer to me a freely available RTOS (or even a free book) for hands preferably that implement user space and are proactive (but not as complicated as linux). Linux has some of the worst documents I've seen so far (I really tried to figure out what the Linux code is, but there are only tons of definitions scattered across a million files and functional intercepts with weirder names, and stuff that got renamed each version , also getting sometimes moved ...)

  • What is the difference between preemption and context switch?

  • What are the main differences between a preemptive and non-responsive core? What is required for the programmer to make the kernel proactive?

  • How to create and work with user mode?

    ARM docs say that in user mode, any command switching to privileged mode will be considered an undefined instruction.

  • If so, is syscalls the only way to use the user program to use kernel code?

  • How does the kernel react or interact with user space?

  • Does this mean that the only kernel thread after boot (on a simple system) will be an idle thread?

  • If the page where the kernel code and data is located does not appear when switching to the user process, and then in the standby or interrupt mode, how does the kernel code execute without displaying in the virtual address space?

  • Is a “preemptive kernel” only that the kernel was designed in such a way that it would be safe to have a context switch during kernel code execution? or is more work required, if any?

Oh, and if such multiple questions are not resolved here, sorry, I could not find anything about it.

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3 answers

As Mat wrote, this is probably unreasonably limited. Nevertheless, I will try to pay as much attention to the sum of the questions as I would like for one reasonably resolved question, in the hope that this will help you start the study.

1 What is the difference between preemption and context switch?

Prevention is the act of interrupting a process without its participation. In this context, this probably means that a timer interrupt will fire. The word comes from the legal concept of preemption : action or right to demand or buy before or in preference to others. For your purposes, this means that when a timer interrupt is triggered, the interrupt service routine (ISR) has preference over the previously run code. This does not have to include the kernel at all; you can run the code in any ISR that will work proactively.

The context switch is what happens when the OS code (works proactively) changes the state of the processor (registers, mode, and stack) between one process or context thread and another. The processor status can be in a specific line of code in one thread. It will have temporary data in registers, a stack pointer in a specific memory region, and other status information. A proactive OS can save this state (either to static memory or to the process stack) and load the state of the previous process. This is called a context switch.

2 What are the main differences between a preemptive and non-responsive core? What is required for the programmer to make the kernel proactive?

In a proactive kernel, an interrupt can fire between any two assembly instructions (called "sequence points"). In an unmanaged kernel, a running process must call the yield() function, which allows other threads to run. Look-ahead kernels are more complex, but provide a better illusion of concurrency. Continuous kernels can be made very simple with setjmp.h , but each thread must regularly call yield() or the other threads will not execute.

When a function of type yield() is called, the state of the processor is saved automatically. If you want your OS to be proactive, you must save this information manually.

3 How to create and work with user mode?

ARM docs say that in user mode, any command switching to privileged mode will be considered an undefined instruction.

Right. However, they also say that any interrupt will be launched in privileged mode automatically. On an ARM system, you can use the svc instruction to generate a software interrupt. Then the SVC code (part of your OS) will run in privileged mode.

4 If so, is syscalls the only way to use the user program for user code?

Right. At least this is the only safe or correct way.

5 How does the kernel react or interact with user space, then?

In ARM, the SVC command can get an 8-bit value. This can be used to generate 256 system calls, such as exiting, turning on interrupts, turning off interrupts, or whatever you need. You can also choose to create a sharing or messaging engine if you need one.

6 Does this mean that the only kernel thread after boot (on a simple system) will be an idle thread?

It completely depends on how you design your system. This is probably simpler if you decide to start your kernel only after all your threads have been created - so you don't have to worry about dynamically allocating threads. Or you can start with an idle thread and add other threads later (through a remote shell? I think you want at least one user thread to work sequentially ...)

7 If the page where the kernel code and data is located does not appear when switching to the user process, and then in the standby or interrupt mode, how does the kernel code execute without displaying in the virtual address space?

Just like kernel mode code works in privileged mode, even if the code was previously executed in user mode, so kernel mode code is run from the main stack pointer (MSP), even if the process code uses a different address space.

8 Does the “preventive kernel” only have the kernel designed in such a way that it would be safe to have a context switch during kernel code execution? or is more work required, if any?

I think this means that the kernel can unload user code, and not that the kernel itself can be unloaded. It would be difficult and unusual for anything to interrupt the core. It will take more work, and I'm struggling to figure out why you need it.

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Instead of answering each of your listed questions, I will do my best to serve your (fortunately) bold request:

The best alternative to answer all questions would be if you could refer to me as a freely available RTOS (or even a free book) for your hand, preferably

Micrium uC / OS-III is a priority-based real-time kernel that (of course) supports both synchronous and asynchronous interrupts. And, with luck, this (and the reason I answer) is because there is a free book and the source code is also available.

Go to the main page for uC / OS-III , and on the left you will see a link to a video telling about the availability of source code (the "source of uC / OS-III" is available).

For books, go to the projects page and choose the most suitable book for your purpose. 90% of the material is the same; only a particular processor (e.g., context switching, interrupts, and initialization) will vary from book to book.

You will need to register to download the book and the code seems fair to me.

Good luck and have fun. Thank you for decisively setting your final goal / objective, which made it a lot easier.

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I got the impression that uC / OS-III was not free, but licensed.

An excellent free real-time OS, and very well explained, is FreeRTOS (http://www.freertos.org/)

You must definitely look there

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Source: https://habr.com/ru/post/921079/


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