Why structure size should be a multiple of the largest alignment of any structure element

Question

I understand the addition that occurs between structure members to ensure that the individual types are correctly aligned. However, why should the data structure be a multiple alignment of the largest member? I do not understand that filling is necessary at the end.

Link: http://en.wikipedia.org/wiki/Data_structure_alignment

Answer 1

Good question. Consider this hypothetical type:

struct A { int n; bool flag; }; 

So an object of type A should take five bytes (four for int plus one for bool), but actually it takes eight. Why?

The answer can be seen if you use this type:

 const size_t N = 100; A a[N]; 

If each A was only five bytes, then a[0] will be aligned, but a[1] , a[2] and most other elements will not.

But why does alignment even matter? There are several reasons related to equipment. One reason is that recently / frequently used memory is cached in cache lines on a silicon processor for quick access. A aligned object smaller than the cache line always fits on one line (but see the interesting comments below), but an unaligned object can move two lines, losing cache.

In fact, there are even more fundamental hardware reasons associated with the fact that data transmitted by bytes are transmitted on a 32-bit or 64-bit data bus, not to mention cache lines. Not only does inconsistency clog the bus with additional samples (due to the fact that it was previously tied), but it will also force the registers to shift bytes as they arrive. Even worse, misalignment tends to confuse optimization logic (at least the Intel optimization guide says that this is true, although I don't have personal knowledge about this last point). Thus, misalignment is very bad in terms of performance.

As a rule, it is worth spending empty bytes for these reasons.

Update: The comments below are helpful. I recommend them.

Answer 2

Depending on the hardware, alignment may be required or simply speed up execution.

There are a certain number of processors (I believe ARM) in which unbalanced access leads to hardware exceptions. Simple and simple.

Although typical x86 processors are more lenient, there is still a penalty in accessing unbalanced fundamental types, because the processor has to do more work to bring the bit in the register before it can work on it. Compilers usually offer specific attributes / pragmas if packaging is desired nonetheless.

Answer 3

Due to virtual addressing.

"... aligning the page to the page size boundary allows the hardware to map the virtual address to a physical address, replacing the higher bits in the address rather than performing complex arithmetic."

By the way, I found a Wikipedia article about this pretty well written one.

Answer 4

If the size of the CPU register is 32 bits, it can capture memory that is at 32-bit boundaries with a single build command. It is slower to capture 32 bits and then get a byte that starts with bit 8.

By the way: there should not be indents. You can ask for frames to be packed.