Cortex a9 boot and memory

I'm starting a newbie in microcontroller programming. The chip of interest here is bark-a9. When resetting or turning on the power, from my readings there should be a code at 0x0000000. My questions, although they may seem too trivial, will help me in developing some concepts.

Is memory address 0x0000000 described in ROM? What happens immediately after reading the code from this address? Should there be some kind of bootloader, and if so, what address should it be in, and should it also be in ROM? Finally, at what point does the kernel load and where is the kernel code?

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ARM sells cores, not chips, what is at this address depends on the chip manufacturer who bought the ARM core and put it on its chip. Implementations vary from vendor to vendor, chip, and chip.

Traditionally, ARM will load from the zero address; more correctly, the reset exception vector is located at address zero. Unlike other processor families, the traditional ARM model is NOT a list of addresses for entry points for exceptions, but instead ARM EXECUTE the instruction at this address, which means that you need to use either a relative branch or a pc load command. The latest cortex-m series that have only thumb / thumb2 (they cannot execute ARM instructions (32 bits)) use a traditional (non-ARM) one, such as a list of addresses, also a zero address is not an exception vector, it is an address to load into a pointer stack, then the second entry is reset, etc. In addition, the list of exceptions for the cerebral cortex is different from the fact that the family has 128 separate interruptions, where the traditional ARM has two, fast and normal. There is a recent question based on the cerebral cortex, or perhaps formulated as a thumb2 question for running linux on the thumb. I think that cortex-m implementations are all microcontroller microcircuits and have only tens of kilobyte chip memory, basically they do not fall into the category you are asking for. And you still ask about Corex-a9.

Several cores, or perhaps all of them, have a boot option, where the boot address could be 0x00000000 or something like 0xFFFF0000 as an alternate address. using this would be very confusing for ARM users, but it provides the possibility, for example, to have rum at one address and a plunger on the other, allowing you to boot when you turn on the power from rom, and then switch the exception table to ram to run at runtime. You probably have a chip with a kernel that can do this, but the chip developer may or may not use these edges of the core functions or bind them to some settings and not give you that flexibility.

You need to look at the data / documents for the chip in question. Find out what the ARM core is called, as you mentioned cortex-a9. Ideally, you want to find out rev as well as r0p0, then go to the ARM website and find TRM, the technical reference guide for this kernel. You will also want to get a copy of ARM ARM, ARM Architectural Reference Manual. Experimental vectors of (traditional) ARM descriptions are described in ARM ARM, as well as more than a ton of information. You also need documentation from the chip manufacturers and see their download scheme. Some will indicate a zero address to boot at startup, then the bootloader will have to do something, turn the bit in the register, and the memory controller will switch address 0 to ram. Some may have address 0, always set to ram, and another address always set to rom, say, for example, 0x80000000, and the chip will copy some elements from rom to ram for you before loading, or the chip may just turn on the power for the reset vector. to be a branch to the rum, then the loader must pin the vector table. There are probably so many different schemes that you can think of, someone has tried this, so you need to study the documentation of the chip suppliers or the sample code to understand. Basically, the answer to your question about roles, it depends, and you need to check with the chip provider.

ARM TRM for the kernel should describe, if any, the strap options on the kernel (for example, the ability to boot from an alternative address), connect these strap options, if any, that are implemented by the supplier. ARM ARM is not really going to go into this, like TRM. A supplier that is worth buying, although it will have its own documentation and / or code that shows what their rom-based download strategy is.

For a system designed for a Linux system, you will have a boot loader, some non-linux code (very similar to the BIOS on your desktop / laptop) that displays the system and ultimately starts Linux. Linux will need enough memory (relative to the microcontroller and other well-known ARM implementations), this ram may end up with sram or dram, and the bootloader may have to initialize the memory interface before it can start Linux. There are popular bootloaders like redboot and uboot. both are significant overkill, but provide opportunities for developers and users, such as the ability to restart Linux, etc.

ARM linux has ATAG (ARAG TAG). You can use linux as a traditional command line to tell Linux boot information, such as which address to find the root file system, and ATAG. Atags are structures in memory that, it seems to me, r0 or something like that are set when you go from bootloader to linux. The general concept, although it is a chip, is loaded from rom or ram, if it prepares the drum so that it is ready to use, Linux may need / need to be copied from rom to ram, the root file system, if it is divided, may want to be copied to another place in the ram. ATAG are ready to tell you where you need to decompress Linux, if necessary, and where to find the command line and / or where to find things like the root file system, some registers are prepared in the form of the passed parameters in linux and, finally, the loader branch the address containing the dot login in linux kernel.

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You must have a boot code available at the address where the hardware starts.

Usually this is achieved by comparing the hardware card with any flash memory or boot ROM with the boot address and start from there.

Please note that in microcontrollers, the code that starts at boot has a rather complicated life - the hardware is not yet initialized, and no hardware means that even the DDR controllers that control access to RAM do not work yet. therefore your code should work without RAM.

After the initial boot code installs enough hardware (for example, installs RAM chips, configures TLB, etc., program MAC addresses, etc.), you start the bootloader.

On some systems, the initial boot code is only the first part of the bootloader. On some systems, a dedicated boot code installs everything and then reads the bootloader from the flash and launches it.

The loader’s task is to load the kernel / OS image into RAM, usually from flash memory or a network (but it can also be shared memory with another board, PCI buses, etc., although this is more rare). After the bootloader has an image of the kernel / OS binary code in RAM, it can unlock it and transfer control (call) to the starting address of the kernel / OS image.

Once upon a time, the kernel / OS image is actually a small decompressor and a block of compressed kernel.

In any case, the end result is that the kernel / OS is available in RAM, and the loader, possibly through the feedback decompressor, passed control over it.

Then the kernel / OS starts, and the OS up.

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Source: https://habr.com/ru/post/892883/


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