How do the hardware and the compiler deal with the x86 instruction, which intersects with an impossible page?

Unlike the (most) RISC arch, x86 instructions have a variable length. The beginning / end of the instruction does not have to be aligned. If the compiler does not execute one instruction, it can simply lie on the page border.

Suppose that if the first byte of the command is in the last byte of the page that is marked as executable. The remaining bytes of the command are on the second page, which is marked as non-executable.

In this case, what happens on the CPU when execution reaches this instruction?

Should the compiler take care of such cases?

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The hardware (must not have been tested) generates GPF.

The compiler does not have to care.

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Source: https://habr.com/ru/post/892550/


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