How to add different rules for certain files?

Question

I have a specific problem with my Makefile.

With this command, I can compile all my * .c files into * .o, which work well:

$(OBJ) : %.o : %.c $(LDSCRIPT) Makefile $(CC) $(ARM9_INCLUDES) -c $(CFLAGS) $< -o $@ 

But now I'm wondering what to do if I want to start -O3 optimization for only one separate file and leave -O0 on the rest?

Is there any command to add another rule for a specific file?

What I am doing right now is each C file with its own rules, which is very annoying because I have about 30 files, which makes the Makefile huge, and every time I change something in one file, it again compiles EVERYTHING.

Answer 1

 particular_file.o : CFLAGS+=-O3 

(assuming GNU make) see variable values ​​for specific purposes in GNU. (and possibly immediately the following variable values ​​for the template).

Also note that the commands are used from the most specific rule for a given file, so you may have one in case the value of a variable for a specific purpose is not enough:

 particular_file.o : particular_file.c completely_special_compiler -o $@ $< %.o : %.c $(CC) $(CFLAGS) -o $@ $< 

Answer 2

It is possible to make the solution a little more extensible.

Suppose you need to compile one set of files in one way and another set of files in a different way, instead of having only one exception, and you could identify patterns in these two sets of files, for example. one set starts with "a" and another set starts with "b", you can do something like this:

 a%.o : a%.c completely_special_compiler -o $@ $< b%.o : b%.c $(CC) $(CFLAGS) -o $@ $< 

See Static Templates for more information.