Defining Burst Mode

Question

I read in a computer organization, and the chapter "Memory" mentions that "SDRAMS has several operating modes, for example, serial modes of different lengths can be set." Can anyone clarify what batch mode is?

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The main reason I got confused about this is that in the I / O chapter, the chapter was defined as a mode in which DMA has direct access to main memory for transferring data blocks, but this definition does not really make sense for the above in chapter of memory ... also Google gives a slightly different definition = S

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Answer 1

Burst mode is when you send one address to memory, but instead of reading / writing data only to the specified address, you also read / write a certain number of consecutive places (usually 4 or 8).

Most modern processors (and even many that are slightly older) have some kind of built-in cache, so a typical read or write will be for all the data in this cache line. Using a read / write interrupt allows you to read / write the entire cache line after specifying only the start address and not read one word, and then send the next address to read the next word and therefore only for all data in the line cache.

Answer 2

SDRAM chips are not organized linearly, but rather as “rows” and “columns”. The row value is entered into the chip followed by the column value, and then the actual data is read or written to the chip. This allows you to use fewer contacts to access each word, while maintaining a chip for storing many millions of words.

"Burst mode" refers to setting the row and column, and then using a separate signal to advance the column, which allows you to access each word in turn, without having to set the row and column each time.