Memory barriers / barriers in C ++: do they have a raise or other libraries?

Question

These days I read about memory fences and barriers to synchronize multi-threaded code and avoid code reordering.

I usually develop in C ++ under Linux, and I use boostlibs extensively , but I cannot find any class associated with it. Do you know if there is a barrier to the fence, or is there a way to achieve the same concept? If not, what good library can I see?

Answer 1

There are no low-level memory barriers yet, but there is a proposed boost.atomic library that provides them.

intrinsics , gcc __sync_synchronize() _mm_mfence() Visual Studio.

++ 0x , std::atomic_thread_fence. gcc ++ 0x V4.4, V4.4, V4.5 . () just::thread ++ 0x, g++ 4.3 4.4, Microsoft Visual Studio 2005, 2008 2010 .

Answer 2

, , , SMP - .

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() (ARM x86), , linux . Linux SMP mb(), rmb() wmb(), ( ) , , SMP.
, , x86 , , ARM, , .

, Linux ( ARMv7 - x86/x64)

#if defined(__i386__ ) || defined(__x64__)

#define smp_mb()    asm volatile("mfence":::"memory")
#define smp_rmb()   asm volatile("lfence":::"memory")
#define smp_wmb()   asm volatile("sfence" ::: "memory")
#endif

#if defined(__arm__)

#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")

#define smp_mb()    dmb()
#define smp_rmb()   dmb()
#define smp_wmb()   dmb()
#endif

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, , Linux.

Answer 3

boost::barrier, . , ? , ? , , .

, , , , Linux - . mb(), rmb() wmb() include/asm-{arch}/system.h.

Answer 4

, 2019 , C++ 11 C++. ist <atomic>.

, std::atomic_thread_fence. :

• std::atomic_thread_fence(std::memory_order_release); , . ( .)
• std::atomic_thread_fence(std::memory_order_acquire); , . ( .)

.