Page error in interrupt context

Question

Can a page error occur in an interrupt handler / atomic context?

Answer 1

It may be, but it would be a disaster. :-)

Answer 2

Yes.

Code for a handler or critical area may span the border between two pages. If the second page is not available, a page error is required to enter it.

Answer 3

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Answer 4

, "Double Fault":

http://en.wikipedia.org/wiki/Double_fault

But these are the terms used in the Intel manual:

http://software.intel.com/en-us/articles/introduction-to-pc-architecture/

or here:

ftp://download.intel.com/design/processor/manuals/253668.pdf (see section 6-38).

There is also something called a triple error, which, as indicated in the name, can also occur when the CPU tries to service a double error error.