Blocked operations with the acquisition and release of semantic (multi-platform)

EDIT: Well, I have a specific question. I want to implement the "exchange" functionality with semantic (pseudo-code) to receive and release:

interlocked_inc_32(target)
{
    mov  ecx, 1
    lea  eax, target
    lock xadd, [eax], ecx
}

interlocked_inc_32_acq(target)
{
    lfence
    mov  ecx, 1
    lea  eax, target
    lock xadd, [eax], ecx
}

interlocked_inc_32_rel(target)
{
    sfence
    mov  ecx, 1
    lea  eax, target
    lock xadd, [eax], ecx
}

The problem with this: I have no idea how to implement this. I am developing on Windows using Microsoft Visual Studio 2010. Of course, there are "intrin.h" and "Windows.h" that provide exactly these functions / internal functions. BUT there is InterlockedIncrementAcquire - this is just a definition for InterlockedIncrement and provides a complete memory barrier. This is not what I want.

/ ****************************************** Original message: / ***** *************************************

, ++ 0x std:: atomic. , .

: EDIT ( )

enum memory_order { memory_order_acquire, memory_order_release, memory_order_acq_rel };

template<class T> class atomic;
template<class atomic_type, std::size_t = sizeof(typename ExtractType<atomic_type>::type)> struct interlocked;

template<template<class> class atomic_type> struct interlocked<atomic_type, 1>
{
    typedef typename ExtractType<atomic_type>::type bit8_type;

    void store(bit8_type value, memory_order order = memory_order_acq_rel) volatile {
        interlocked_xchg_8<order>(&static_cast<atomic_type volatile*>(this)->m_value, value);  
    }

    bit8_type load(memory_order order = memory_order_acq_rel) const volatile
    { 
        interlocked_cmp_xchg_8<order>(
            const_cast<bit8_type volatile*>(&static_cast<volatile const atomic_type *const>(this)->m_value), 
            static_cast<atomic_type const volatile*>(this)->m_value, 
            static_cast<atomic_type const volatile*>(this)->m_value
        ); 
    }

    bit8_type exhange(bit8_type, memory_order order = memory_order_acq_rel) volatile {
        return interlocked_xchg_8<order>(&static_cast<atomic_type volatile*>(this)->m_value, value);
    }

    bool compare_exchange(bit8_type comperand, bit8_type new_value, memory_order order = memory_order_acq_rel) volatile 
    {
        return interlocked_cmp_xchg_8<order>(
            &static_cast<atomic_type volatile*>(this)->m_value,
            new_value,
            comperand
        ) == comperand;

    }
};

template<template<class> class atomic_type> struct interlocked<atomic_type, 2> { };
template<template<class> class atomic_type> struct interlocked<atomic_type, 4> { };
template<template<class> class atomic_type> struct interlocked<atomic_type, 8> { };


template<class T>
class atomic : public interlocked<atomic<T>> { T m_value; };

-, , "" .

. :

PS: : boost:: uint32_t ( boost\cstdint.h) uint32_t ( stdint.h)?

+3
2

x86? , - , ? ?

+3

, , , (mfence). , x86 sfence/lfence.

+2

Source: https://habr.com/ru/post/1787902/


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