Include target-specific files

Question

I have a Makefile that includes make files from subdirectories. However, I want to include these "sub" -makefiles based on the selected target.

It is assumed that sub files of make files define different object files and a target executable file must be created depending on these object files.

Assuming sub-makefile1 sets the variable

OBJECTS: = foo.o foo1.o

sub-makefile2 installs

OBJECTS: = bar.o bar1.o

And the general rule:

lib /%. so: $ (OBJECTS)
    link $ ^ -o $ @

The goals are (for example):

foo: lib / foo.so

bar: lib / bar.so

whereas target foo should include foo makefile, target bar bar-makefile.

Any idea how to handle this situation?

Thanks Christian

Answer 1

, - - Make. , .

. MAKECMDGOALS. makefile make . ( ), , :

include sub-makefile1
FOO_OBJECTS := $(OBJECTS)

include sub-makefile2
BAR_OBJECTS := $(OBJECTS)

lib/%.so:
    link $^ -o $@

lib/foo.so: $(FOO_OBJECTS)

lib/bar.so: $(BAR_OBJECTS)

foo bar : % : lib/%.so

( , foo_OBJECTS, , .)

Answer 2

$(MAKECMDGOALS), :

ifeq ($(MAKECMDGOALS),foo)
include sub-makefile1
endif
ifeq ($(MAKECMDGOALS),bar)
include sub-makefile2
endif

# Rest of Makefile follows...

, , make . , foo bar, make:

ifeq ($(MAKECMDGOALS),foo)
include sub-makefile1
foo: # ...
    # Normal commands to build foo
else
foo:
    $(MAKE) $<
endif

ifeq ($(MAKECMDGOALS),bar)
include sub-makefile2
bar: # ...
    # Normal commands to build bar
else
bar:
    $(MAKE) $<
endif