Head wrap around hardware representations of numbers: a hypothetical question with two additions

Question

This is a super naive question (I know), but I think it will lead to a good jump in terms of how the basic set of CPU commands actually executes:

In a system with two additions, you cannot invert the sign of the most negative number that your implementation can represent. The theoretical reason for this is obvious in that the negation of the most negative number would be outside the implementation range (the range is always something like -128 to 127).

However, what actually happens when you try to perform the negation operation on the most negative number is rather strange. For example, in an 8-bit representation, the largest negative number is -128 or 1000 0000 in binary format. Normally, to negate a number, you have to flip all the bits and then add one. However, if you try to do this with -128, you will get:

1000 0000 ->
0111 1111 ->
1000 0000

the same amount you started with. For this reason, wikipedia calls it a "weird number."

The same wikipedia article says the above negation

defined as an overflow condition since it was carried over, but not from the most significant bit.

, :
A) ?
B) , CPU , , , , . , , , (.. -127 127 8 )? , ​​ , ?

Answer 1

, CPU , , , . , , .

, .

---

?

" 1" : LSB

old-bit  carry-in  new-bit  carry-out
-------------------------------------
   0        0        0         0
   0        1        1         0
   1        0        1         0
   1        1        0         1

( new-bit = old-bit xor carry-in carry-out = old-bit and carry-in). "Enter" LSB - 1, , "" ( ).

signed-overflow = (carry-in and not carry-out).

Answer 2

MSB , , . ¹ - .

, , . , 1 127, -128, , +128 -128 .

-127 +127, , 127 + 1 = -127 .

Twos-, , .

, 4- 0001 0111. , MSB :

     0        0        0        1
     | 0      | 1      | 1      | 1
     | |      | |      | |      | |
     v v      v v      v v      v v
0 <- ADD <-1- ADD <-1- ADD <-1- ADD <- 0
^     |    ^   |        |        |
      v        v        v        v
      1        0        0        0

ALU, , , - .

^{1. 0 255 -127 128, .}

Answer 3

wikipedia , . , , 128 9 , 8- . , . 0x80, 0x80, .

, , .. . , , , . , 0b001 0b001,

 1
001
001
===
010

, 0b10 (2 ), , , - , , , 0b010.

, 1 1 - 0b10, 0, , , , . , -, , , , , - .

, , , , , .

, , , . , , .

, , 8, - , .

, - , - , - . - msbit, - msbit.

000 111 000 1 1
001 110 111 0 0
010 101 110 0 0
011 100 101 0 0
100 011 100 1 0
101 010 011 0 0
110 001 010 0 0
111 000 001 0 0

- :

00+1 = 001
01+1 = 010
10+1 = 011
11+1 = 100

, , - , . , msbit 111 011, , . 111 . 011 , .

, - , , msbit carry in , msbit , -, .

, , . , , , 0b01111111, . 0b11111111, . , , , , , , 1 .

, , , underflows .. , , , 16- 8- , 8- 5- .

, . , . - - ( ) . 8 8- , - , , lsbit . - , , lsbit carry in. Subtract , , . , , , .

, , , , , , . , . , , , , , , . , , , 16 = 8 8 , 8 , . , int = int * int; , , , ( ..). .

Answer 4

ARM (DDI100E):

OverflowFrom
     Returns 1 if the addition or subtraction specified as its parameter 
     caused a 32-bit signed overflow. [...]
     Subtraction causes an overflow if the operands have different signs,
     and the first operand and the result have different signs.

NEG
     [...]
     V Flag = OverflowFrom(0 - Rm)

NEG - , .. .

V . Z (), C () N ().

0 - (-128) = 0 + 128 = -128 0, , -128, , V.