Reset Altera M9K content to 0 (power value)

Question

Good afternoon,

I am working on a Stratix III FPGA that contains M9K blocking blocks, the contents of which are conveniently initialized to zero when the power is turned on. This is very suitable for my application.

Is there a way to reset the contents to return to zero without turning on / off the power / etc FPGA? There is no such option in the megawizard plugin manager, and I would like to avoid losing the logic path, which just goes and writes zero to each address sequentially ...

I looked around and there is no mention of such a mechanism, but I thought I would ask just in case someone finds out a convenient trick:] By the way, I work in VHDL, but I must be able to translate any Verilog.

Datasheet (no answer!): Http://www.altera.com/literature/hb/stx3/stx3_siii51004.pdf

Thanks in advance
- Thomas

PS: This is my first post here, so if I violated any etiquette, please let me know :)

Answer 1

Sorry, the usual ways to do this are:

• to reconfigure fpga (you can call this from your hardware if you don't want all of this to "disappear" when it is reconfigured).
• explicitly write zeros in (as you said)

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