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When setting the SD / MMC card to SPI mode, can CS pass between bytes?

I have a microprocessor with a card chip select line ( CS) tied to a 'frame' signal, automatically controlled by an SPI circuit (SSP). This leads to an CSincrease between each byte.

MMC / SD specifications require it to be CSkept low in order to enter SPI mode. Does it need to be kept low all the time or only when transmitting each byte CMD0?

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On sdcard.org, I found various PDF specifications for SDIO. None of them seem to have an explicit synchronization operator that clarifies this. However, this statement holds:

(1) SD bus mode is selected by CMD0 (hold pin 1 to maximum while CMD0 is running).

from page 88 Simplified SD Host Specifier Version 2.00 . ("Pin 1" - chip selection ( CS))

Given this proposal, the SD card manufacturer will be justified in requiring you to claim CSthrough all sent bits D0..D15. In other words, I think you cannot use the SPI frame signal and you will need a GPIO pin or similar.

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Source: https://habr.com/ru/post/1752926/

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