JIT-ing on FPGA?

Question

Many VMS, JVM / LLVM / ... have JIT - as the code is interpreted, x86 instructions are created on the fly and executed.

If something similar to FPGAS? Is there somewhere where FPGA works, will I reconfigure it? [If so, please provide links to the project / paper. If not, what is the technological bottleneck that prevents this?]

Thank!

Answer 1

Is there somewhere where the FPGA I reconfigured it?

"partial reconfiguration" may be a phrase for Google for.

Answer 2

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