How is the implicit segment register of the nearest pointer defined?

Question

See Section 4.3 of the Intel 64 and IA-32 Software Developer's Guide. Volume 1: Basic Architecture , it reads:

Next to the pointer is a 32-bit offset ... inside the segment. All pointers to memory in a flat memory model, or for links in a segmented model, where identification of an available segment is implied, are used next to the pointers.

This makes me wonder: how is a particular segment register determined?

I know that (%eip)and offset (%eip)(for example, -4(%eip)) addresses used %csby default and that (%esp)and offset addresses (%esp)are used %ss, but what about the (%eax), (%edx), (%edi), (%ebp)and so on, and whether the implicit segment register also depend on instructions that address operand memory displayed in?

Answer 1

In addition CS, and SSregistrations that you have mentioned, most of the other complaints will use segment register DS. A few exceptions that I can recall:

• ES ( EDI)
• EBP " " SS. EBP , DS ( ESP)