Cleanest Reset for ARM Processor

Question

Recently, I have been cleaning up some C code that runs on an ARM7 controller. In some situations (update, fatal error, etc.), the program will reset. Currently, it just goes to 0 and assumes that the startup code will correctly initialize everything. This made me wonder what would be the best a la "Leave No Trace" procedure for ARM reset. Here is my first crack:

void Reset(void)
{
   /* Disable interrupts */
   __disable_interrupts();

/* Reset peripherals, externals and processor */
AT91C_BASE_RSTC->RSTC_RCR = AT91C_RSTC_KEY | AT91C_RSTC_PERRST | AT91C_RSTC_EXTRST| AT91C_RSTC_PROCRST;

while(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_SRCMP);

/* Jump to the reset vector */
(*(void(*)())0)();
}

This code assumes the ARM IAR compiler and At91Lib. Anything I have not considered?

Answer 1

. Atmel SAM3U. , , !

reset, reset. IAR __noreturn , . reset ram (. __ramfunc), , .

, AT91C_RSTC_EXTRST, reset .

__noreturn void Reset(void)
{
    __disable_interrupts();

    AT91C_BASE_RSTC->RSTC_RCR = AT91C_RSTC_KEY |
                                AT91C_RSTC_PERRST |
                                AT91C_RSTC_EXTRST |
                                AT91C_RSTC_PROCRST;

    while (AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_SRCMP);
}

Answer 2

" reset", reset, - reset - , .

" reset", . " reset vector", ( , ADC- ..)

Answer 3

@Dan , , reset. ... ARMv7-M (, Cortex-M3 ..), , :

#define SYSRESETREQ    (1<<2)
#define VECTKEY        (0x05fa0000UL)
#define VECTKEY_MASK   (0x0000ffffUL)
#define AIRCR          (*(uint32_t*)0xe000ed0cUL) // fixed arch-defined address
#define REQUEST_EXTERNAL_RESET (AIRCR=(AIRCR&VECTKEY_MASK)|VECTKEY|SYSRESETREQ)

printf("\nRequesting an external reset...\n");
fflush(stdout);
REQUEST_EXTERNAL_RESET;
printf("\nIt doesn't seem to have worked.\n");
fflush(stdout);

. ARMv7-M, AIRCR SYSRESETREQ.

This may be practically the same solution as Judge Maygarden, but the identifiers used in his message seem specific to Atmel, while the AIRCR and SYSRESETREQ registers are determined by the underlying ARMv7-M architecture, not by Atmel.