When switching to kernel mode, the variables do not change - part of the kernel of the virtual address space is simply marked as available only in ring0, so it becomes available. The kernel modifies pagetables when the current process changes.
The instruction is int 0x80served by a trap gateway that supplies the address for the processor transition as a CS: EIP pair. The new CS (code segment selector) includes CPL (current privilege level) 0, which leads to the transition to ring0.
ring3 ring0, SS: ESP TSS ( ) TSS. .
CS: EIP ( ). - int 0x80.
IRET - CS: EIP . CS CPL 3, ring3, ring3.