Counting a number starting at zero in one data cycle

Question

As you all might know, the MIPS instruction set supports clz (count lead zero) as follows:

clz $ t0, $ t1 counts the leading zeros t0 = # leading zeros in t1

I am writing a single datapath file in verilog and was just interested in what ALU should support so that I can do this ... any ideas

Answer 1

An approach is possible here (I ignore the case of input 0, which is probably best viewed as a special case):

• The number of leading zeros in a 32-bit number:
  • the number of leading zeros in the upper 16 bits if any of the first 16 bits is non-zero; or
  • 16, 16 , 16
• 5- ( 0...).
• 16- , .
• .

Verilog :

result[4] = (value[31:16] == 16'b0);
val16     = result[4] ? value[15:0] : value[31:16];
result[3] = (val16[15:8] == 8'b0);
val8      = result[3] ? val16[7:0] : val16[15:8];
result[2] = (val8[7:4] == 4'b0);
val4      = result[2] ? val8[3:0] : val8[7:4];
result[1] = (val4[3:2] == 2'b0);
result[0] = result[1] ? ~val4[1] : ~val4[3];

Answer 2

, ( ), - 32 ( 32-) , , , .

- ():

if word == 0: return 32
elsif (word & 1) == 0: return 31
elsif (word & 3) == 0: return 30

.

Answer 3

clz16, 16 , 4- (0..15) 'allzero'. , clz32, , , 4 2 .

Clz16 clz8 . Clz8 clz4. Clz4 - <= 4 , , , .

, , , , ( ), , . . (, 64, 128 ) . to log2 (n).