Threadafe single-user, single-profile FIFO on embedded system

Question

I have a TI DSP (TMS320F28235, if anyone is interested) that I need to implement FIFO for queuing information between the main loop code and the interrupt. High-speed execution for this queue is very important, but it is the right operation, and I'm not sure if I can avoid the FIFO implementation without any explicit synchronization, or if not, where I need to disable interrupts.

I found this page and wondered if anyone here could comment on its applicability.

Answer 1

. , . , . , , , .

, CDC 6600. CDC 6600.

Answer 2

.

.

Example ; Make the operation "VarC = VarA + VarB" atomic:
    DINT ; Disable interrupts (INTM = 1)
    MOVL ACC,@VarA ; ACC = VarA
    ADDL ACC,@VarB ; ACC = ACC + VarB
    MOVL @VarC,ACC ; Store result into VarC
    EINT ; Enable interrupts (INTM = 0)

- -

, -, . . ​​ , . , - , FIFO , , , , , .

, - , . ( - ).