What are the benefits of programming for a non-cache multi-core multi-core machine?

What are the benefits of programming for a multi-core multi-core machine without a cache? Cache_coherence has many advantages, but how to take advantage of the opposite of this function is an independent cache for each individual kernel. What software paradigm and what specific practical problems could use such an architecture for cache-coherent?

+3
source share
5 answers

What is the programming paradigm

Messaging

-?

- " ": "" , - "".

, , .


, : " -" - (, ).

+4

. , , , . .

. , (, , ) . , - .

, , , , , , - , .

, -, , , , . . , ( - ) , , . : -)

+5

, , , .

+2

; , - -, , . , , , .

, jldupont, , () IPC.

+1

Cell SPE . , , , .

It has great speed advantages because the hardware does not have to spend time synchronizing cache line states between cores.

In the cell, the programmer must synchronize manually by writing code to copy the local SPE memory back and forth. Thus, the disadvantage is the much greater complexity of the program.

+1
source

Source: https://habr.com/ru/post/1725279/


All Articles