Interrupt Handling on SMP Systems

Question

Interrupts are assigned to a fixed processor (always handled by the same CPU)?

To ask a question in context:

From: http://msdn.microsoft.com/en-us/library/ms795060.aspx

The spin lock, which protects the common area, has an IRQL equal to DIRQL, at which the device is interrupted. As long as the critical section procedure holds the spin lock and accesses the common area in DIRQL, ISR cannot be run on either a single-processor machine or on SMP.

This makes sense on a single-processor machine, since the interrupt will not be serviced by the processor until the lock is released, since the IRQL of the processor is not less than the IRQL of the interrupt. However, on an SMP machine, to prevent an interrupt that will be processed by another processor (and not the CPU that owns the lock) and corrupt the data ...?

Answer 1

Reading the next section ...

In an SMP machine, ISR cannot obtain a spin lock that protects shared data, while the critical section contains direct lock and access to shared data in DIRQL.

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Answer 2

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