How can you insure code execution without changing runtime due to cache?

In an embedded application (written in C, on a 32-bit processor) with strict real-time constraints, the execution time of critical code (especially interrupts) should be constant.

How do you guarantee that temporary variability is not introduced into code execution, especially due to the processor cache (be it L1, L2 or L3)?

Please note that we are dealing with the behavior of the cache due to the huge effect that it has at execution speed (sometimes more than 100: 1 against access to RAM). The variability that arises due to the specific architecture of the processor is nowhere near the size of the cache.

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If you can access the hardware or work with someone who can, you can disable the cache. Some processors have a pin that, if connected to ground instead of power (or perhaps vice versa), will disable all internal caches. This will give predictability, but not speed!

Otherwise, it is possible that in some places in the program code intentional filling of the cache may be written undesirable, therefore, no matter what happens, it may be guaranteed to skip the cache. It’s done correctly, which can give predictability and, perhaps, can be done only in certain places, so speed can be better than completely disabling caches.

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Source: https://habr.com/ru/post/1696925/


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