Saving forwarding address and data. What is the difference between STD and STA in Intel Optimization Guide?

Question

I am wondering if any experts from Intel can show me the difference between STD and STA with respect to the Intel Skylake core.

The Intel Optimization Guide has an image describing the "superscalar ports" of Intel Cores.

Here is the pdf . The image is on page 40.

.

Here is another image from page 78 , this figure describes "Store address" and "Store data":

• Prepares forwarding and saving retirement logic with the address of the stored data.

• Prepares forwarding and saving retirement logic with saved data.

, Skylake # 1 3 , # 2 , , .

"", . , (aka: STD/Port 4). - /, , STD STA?

Answer 1

Intel P6, Pentium Pro.

- uop. Sandy/IvyBridge , Intel. ROB, . . . (Intel , Agner Fog Haswell/Skylake, PDF , , , uops . . x86 x86 tag wiki)

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, Skylake # 1 3 , # 2

2 3 uops AGU, . 7 - .

7, p2/p3. "" , 2 + 1 .

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Nehalem ( P6) p2 , p3 - , p4 - .

IvyBridge/Sandybridge , AGU ( ) (p23). / 256 AGU ( 256b uops 2 , uop 2- ). , 2 /1 Sandybridge, 256- / AVX, 128- .

-AGU 7 / 256b, , AGU, .

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uop ( , ) (aka Buffer Buffer Buffer Intel). , , , , , , ( ) , .

: . ( , machine_clears.memory_ordering perf counter . , , , Skylake , - ).

, uop , /, , store-address, .

, , , Intel , 7 AGU, , store-address p7, p2/p3.

- "" p23, , L1D 96 / (2 + 1 32- YMM) ~ 81 / Skylake Intel. Skylake 2 + 1 4- , , , 81-/ - . 96B/clock, , , .

, uap- - p23, , , , .

, (aka: STD/Port 4).

/ , , , L1D .

• ?
• x86-

/ , , args ( stack-args, , ). - - . , , .

Answer 2

, , " ".

x86 . x86 "" Micro-ops (uOps) Intel. , x86 . , , :

, " " " ".

MOV [ESP+ECX*4+12345678], AL

. 50 (2.3.2.4. Loop Stream Detector (LSD)).

, uOp. , , x86 uOps . uOps: " " " ". uOps , uOps.

Skylake "store data", , Skylake . "Store Address" , Skylake (, - , uOp ?).