How to prevent string evaluation in make / shell?

Question

I have this makefile:

echo:
    echo "PASS=$(PASS)"

I call:

PASS='MYPA$$' make

What shows me:

echo "PASS=MYPA$"
PASS=MYPA$

Someone is evaluating $$→ $.

Is it a shell? Not when entering a value, as I use single quotes, not allowing the shell to evaluate it.

Maybe the shell called by make does this ...

Or can it be makeyourself?

How can i avoid this?

Answer 1

In makevariables

make , ( make ). , , , .

:

foo = $(bar)
bar = $(ugh)
ugh = Huh?

all:
    echo $(foo)

# echoes: Huh?
# `$(foo)' expands to `$(bar)' which expands to `$(ugh)' which finally expands to `Huh?'

GNU make, - :

:= (. " " ). , , . , . ; , .

, , var := $(PASS) $$ PASS .

shell make, ( make):

expanded := $(shell echo "$$PASS")

test:
    echo 'PASS=$(expanded)'
    echo "PASS=$$PASS"

shell echo "$PASS" ($$ $ make ), ( PASS) make expanded. make, .

make , , -/ . ( ) , .

, make expanded PASS Makefile script:

$ PASS='MYPA$$' make
echo 'PASS=MYPA$$'
PASS=MYPA$$
echo "PASS=$PASS"
PASS=MYPA$$