Makefile syntax: what is $ (RM)?

Question

I saw the following Makefile online ( here ):

hello:

clean:
    $(RM) hello

When there is a hello.c file in the same directory as the Makefile, makein Terminal builds helloexecutable. When make cleanexecuted, the helloexecutable is deleted instead rm -f hello. So it $(RM) hellomeans rm -f hellohere.

• What does $ (FOO) mean? Is this a special Makefile syntax or something like a bash command?
• Can I run other commands as well as $ (RM), like $ (PWD)?

Answer 1

Makefile. ( Makefile) ( make, ).

:

make -p

: 10.3 ,

$(NAME) ${NAME}

Answer 2

$(RM) - "make" ( - POSIX lingo). : $(NAME) ${NAME}.

POSIX , errrrr, , :

MAKE=make
AR=ar
ARFLAGS=-rv
YACC=yacc
YFLAGS=
LEX=lex
LFLAGS=
LDFLAGS=
CC=c99
CFLAGS=-O 1
FC=fort77
FFLAGS=-O 1
GET=get
GFLAGS=
SCCSFLAGS=
SCCSGETFLAGS=-s

, RM . RM , -, rm -f ( make , POSIX, ).

, $(PWD) , ( ${PWD} , ), . , , $(PWD) "make" pwd . undefined "make" , .

Answer 3

make . env RM="rm -f" make, .

You can run pwd, but to use $(PWD)you need to install PWD="pwd".