How to create ctags for system verilog?

Question

I want to generate a tagsfile for system verilog.

I found this really useful link , and I was able to create a UVM file file.

But my question is about SV. Since there are no separate sv files, the language is built into the compiler itself, how can I create a tag file for this?

Thanks in advance.

Answer 1

What happened to the link you provided? here are some others

https://verificationacademy.com/forums/systemverilog/ctags-systemverilog http://hackdut.blogspot.com/2015/03/ctags-and-vim-to-work-with-systemverilog.html

Answer 2

SystemVerilog Universal Ctags, Verilog, SystemVerilog.

Verilog/SystemVerilog Vim Plugin, .

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