In theory, there is a data dependency between a branch instruction and an earlier instruction (in this case SUB) that changes the register that the branch will check for transition, but on many modern architectures this dependence does not extend to the following instructions, unlike other data dependencies, from due to branch prediction.
, , SUB - , (.. ) SUB, , SUB, , , , .
, , . , ( ), . , xor r1, r1, r1 foo32bits >> 32 : , , (0), .