TL: DR . In NASM, after RESB / RESW / RESD / RESQ there are RESO, RESY and RESZ . In my Intel mnemonics and terminology (used in manuals), O (oct) and DQ (double-quad) are used. But DQWORD is not used, only OWORD.
Disassemblers will use the xmmword ptr [rsi]explicit size of the memory operand in MASM or .intel_syntaxGNU syntax . IIRC, there are no instructions where this size is no longer implied by mnemonics and / or case.
, x86 Intel. ISA (, ARM MIPS) "" - 32 , x86 8086.
x86-64 Octword. CQO sign-extends rax rdx: rax.
CMPXCHG16B - , 16 , Intel "oct" . m128. "" .
SSE/AVX Integer . DQ (double-quad), O (oct). , PUNPCKL *, :
- PUNPCKLWD: word- > dword (16- > 32)
- PUNPCKLDQ: dword- > qword (32- > 64)
- PUNPCKLQDQ: qwords- > 128- (64- > 128).
DQ, DQWord. Double-Quadword , , Intel. , "" " ". "", , OWord .
MOVDQA //reg-reg. , AVX 256b, VMbQQA 256b.
128- 256- 128 , VEXTRACTF128, Intel ( CMPXCHG8B).
:
NASM:
3.2.1 DB :
DB, DW, DD, DQ, DT, DO, DY DZ ... ( )
DO, DY DZ .
DT - x87. DO - 16 , DY - YMMWORD (32 ), DZ - 64 (AVX512 ZMM). , , ? DB/DW/DD/DQ .
, .
realarray resq 10 ; array of ten reals
ymmval: resy 1 ; one YMM register
zmmvals: resz 32 ; 32 ZMM registers
AVX512
Microsoft , WinAPI 16 ?, AVX512 . VSHUFF32x4 128b 32- .
Intel = 16 . AVX512BW AVX512DQ . , epi32, d. (.. _mm256_broadcastd_epi32(__m128i), _mm256_broadcastw_epi16(__m128i). b/w/d/q . , ?)
(- , asm , - intrinsics? mnemonics asm, , , intrinsics .)