It always starts for the purpose of "everything", even if nothing is updated

Question

I have these files

• test.cpp
• Point.h
• Point.cpp
• Triangle.h
• Triangle.cpp

and I want to have a make file, which allows me to create each of the classes Pointand Triangleindividually, calling if necessary make Point, or make Triangle(a header file, or the source file has changed). make allmust compile everything and, if necessary, create an output program Test.

This is what I came up with so far:

CXX=g++
CXXFLAGS=-std=c++11 -Wall -pedantic
OBJS=Test.o Point.o Triangle.o

all : $(OBJS)
    $(CXX) $(CXXFLAGS) $(OBJS) -o Test


Point.o : Point.cpp Point.h
    $(CXX) $(CXXFLAGS) -c Point.cpp

Point : Point.o


Triangle.o : Triangle.h Triangle.cpp Point.h
    $(CXX) $(CXXFLAGS) -c Triangle.cpp

Triangle : Triangle.o


clean:
    \rm *.o Test


.PHONY : Point Triangle

This seems to work, but the problem is that when I run make all(or just make) several times, it runs the command, even if nothing has changed, giving the following output:

g++ -std=c++11 -Wall -pedantic Test.o Point.o Triangle.o -o Test

, - " ". - , , . ?

Answer 1

all Test. - , . . , all Test. - :

all : Test

Test : $(OBJS)
    $(CXX) $(CXXFLAGS) $(OBJS) -o Test

Test.o.

Answer 2

Test.o .

Answer 3

Guessing make behavior will spend a lot of precious time on you. I have seen people spend hours / days in endless cycles of reorganizations, each of which comes out with different results.

Here is the good news. Almost every make tool has an “explain” function (gnu make uses - debug ), with which you can determine the reasons for the recovery.