How the JSR-133 cookbook enforces all the guarantees made by the Java memory model

Question

I understand that the JSR-133 cookbook is a well-cited reference on how to implement the Java memory model using a series of memory barriers (or at least visibility guarantees).

This is also my understanding, based on the description of various types of barriers, that StoreLoad is the only one that ensures that all processor buffers are cleared of the cache and therefore provide fresh reads (avoiding storage redirection) and guarantee that the latter value is monitored due to cache coherency .

I looked at a table of specific barriers required for different program series related to volatile / regular storages / loads, and which memory barriers would be needed.

From my intuition, this table seems incomplete. For example, the Java memory model guarantees the visibility of the monitor retrieval action for all actions performed before it is released in another thread, even if the updated values ​​are unstable. In the table in the link above, it seems that the only actions that flush processor buffers and propagate changes / allow you to monitor new changes are the Volatile Store or MonitorExit storage, followed by the Volatile Load or MonitorEnter. I don’t see how barriers can guarantee visibility in my example above, when these operations (according to the table) use only LoadStore and StoreStore, which, from my understanding, concern only reordering in the stream and cannot guarantee the fulfillment of the guarantee (through streams that are )

Where am I mistaken in my understanding here? Or this implementation is performed only earlier, and not guarantees of synchronization or additional actions when receiving / releasing monitors.

thank

Answer 1

StoreLoad is the only one that ensures that all processor buffers are cleared of the cache and, therefore, provide fresh reads (excluding storage forwarding) and ensure that the latest value is monitored due to cache coherency.

This may be true for x86 architecture, but you should not think about this level of abstraction. Perhaps cache coherence can be costly for processors to be executed.

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[StoreStore]
[LoadStore]
x = 1; // volatile store
[StoreLoad] // Case (a): Guard after volatile stores

...

[StoreLoad] // Case (b): Guard before volatile loads
int t = x; // volatile load
[LoadLoad]
[LoadStore]
<other ops>

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Answer 2

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Answer 3

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