Type conversion in VHDL: from real to integer - is rounding mode set?

Question

While debugging the handling of custom physical types in Vivado ( read more ), I found a different behavior for converting types from real to integer.

Here is my sample code:

library IEEE;
use     IEEE.STD_LOGIC_1164.ALL;
--use     IEEE.MATH_REAL.all;

entity Top_PhysicalTest_Simple is
  port (
    Clock : in STD_LOGIC;
    Input : in STD_LOGIC;
    Output : out STD_LOGIC
  );
end;

architecture top of Top_PhysicalTest_Simple is
  constant int_1     : INTEGER  := natural(0.5);
  constant int_2     : INTEGER  := integer(-0.5);
--  constant int_2     : INTEGER  := natural(-0.5);
begin
  assert FALSE report "16 - int_1 (natural(0.5)):  " & INTEGER'image(int_1) severity note;
  assert FALSE report "17 - int_2 (natural(-0.5)): " & INTEGER'image(int_2) severity note;

  Output <= Input when rising_edge(Clock);
end;

A mannequin-flip-flop is used so that some instruments do not complain about an empty structure.

XST 14.7:

Elaborating entity <Top_PhysicalTest_Simple> (architecture <top>) from library <work>.
Note: "16 - int_1 (natural(0.5)):  1"
Note: "17 - int_2 (natural(-0.5)): 0"

XST seems to use round up mode, and it handles checking the range of inclusions of the type. So I have to use integer(-0.5)instead natural(-0.5).

Vivado 2014.4:

[Synth 8-63] RTL assertion: "16 - int_1 (natural(0.5)):  1" ["D:/Temp/PhysicalTest_Vivado2014.4/vhdl/Top_PhysicalTest_Simple.vhdl":80]
[Synth 8-63] RTL assertion: "17 - int_2 (natural(-0.5)): -1" ["D:/Temp/PhysicalTest_Vivado2014.4/vhdl/Top_PhysicalTest_Simple.vhdl":81]

Synth, , round to . , , natural(..) integer(..).
: constant int_2 : INTEGER := natural(-0.5); .

GHDL 0.29:

GHDL 0.29 natural(..). , , , 0,31, , .

GHDL 0.31:

. GHDL , :
Top_PhysicalTest_Simple.vhdl: 29: 14: std_logic_1164.v93

:

• VHDL ? , ?
• , ?

Answer 1

IEEE Std 1076-2002, 7.3.5 " "

The conversion of a floating point value to an integer type rounds to
the nearest integer; if the value is halfway between two integers,
rounding may be up or down.

- , , IEEE.MATH_REAL ( CEIL, FLOOR / TRUNC).

Answer 2

( , ...)

ghdl-0.31-mcode-win32:

  C:\brian\jobs\ghdl_test\paebbels>md work.ghd

  C:\brian\jobs\ghdl_test\paebbels>ghdl -a --workdir=work.ghd Top_PhysicalTest_Simple.vhd

  C:\brian\jobs\ghdl_test\paebbels>ghdl -r --workdir=work.ghd Top_PhysicalTest_Simple
  Top_PhysicalTest_Simple.vhd:18:3:@0ms:(assertion note): 16 - int_1 (natural(0.5)):  1
  Top_PhysicalTest_Simple.vhd:19:3:@0ms:(assertion note): 17 - int_2 (natural(-0.5)): -1

---

"0.31 - Windows ( mcode)" "GHDL "

mcode Windows, 0,31, 0.29 NSH- GHDL . , , 0.31 Windows INSTALL, reanalyze_libraries.bat

, :

  C:\brian\jobs\ghdl_test\paebbels>ghdl -v
  GHDL 0.31 (20140108) [Dunoon edition] + ghdl-0.31-mcode-win32.patch
  Compiled with GNAT Version: GPL 2013 (20130314)
  mcode code generator
  Written by Tristan Gingold.

  Copyright (C) 2003 - 2014 Tristan Gingold.
  GHDL is free software, covered by the GNU General Public License.  There is NO
  warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

:

  C:\brian\jobs\ghdl_test\paebbels>ghdl --dispconfig
  command line prefix (--PREFIX): (not set)
  environment prefix (GHDL_PREFIX): C:\Ghdl\ghdl-0.31-mcode-win32\lib
  default prefix: C:\Ghdl\ghdl-0.31-mcode-win32\lib
  actual prefix: C:\Ghdl\ghdl-0.31-mcode-win32\lib
  command_name: C:\Ghdl\ghdl-0.31-mcode-win32\bin\ghdl.exe
  default library pathes:
  C:\Ghdl\ghdl-0.31-mcode-win32\lib\v93\std\
  C:\Ghdl\ghdl-0.31-mcode-win32\lib\v93\ieee\