ARM Cortex M0 / M3 / M4: Why a PC Always Has a Thumb State Number

Question

As far as I understand, ARM Cortex-M processors are always in a Thumb state, which means:

The speaker status indicated by the software counter is odd (LSB = 1). branching to an even address will throw an exception because switching to ARM Status is not allowed.

However, although I use CortexM0 and M4 CPUs, PCs are always even . Every time I enter branches, LR writes PC + 1 and every time I return, PC gives LR-1.

For example, if lr = 0x0000_01D5,

Run

Bx lr

Then the PC should be 0x0000_01D5, while it gives 0x0000_01D4.

Is it impossible?

Any comments would be appreciated.

Answer 1

From the Cortex-M4 Technical Reference Guide :

2.3.1 Software counter

Register R15 is a program counter (PC).

Bit [0] is always 0, so instructions are always aligned with the word or word boundary.

Reading from the PC should not return an odd address. However, when you write to PC , LSB values ​​are loaded into T-bit EPSR. From the Cortex-M3 General User Guide - 2.1.3. Main registers

Thumb State

The Cortex-M3 processor only supports executing instructions in Thumb Status. The following can clear the T bit to 0:

 instructions BLX, BX and POP{PC} restoration from the stacked xPSR value on an exception return bit[0] of the vector value on an exception entry or reset. 

Attempting to follow instructions when the T bit is 0 results in a malfunction or lockout. See the Lock section for more information.

In other words, you can read even values ​​from a PC , but you cannot write such values ​​under normal circumstances.

Answer 2

I had this confusion. Lsbit is set for situations where the address will be used by BX. Lsbit shuts down when it enters the computer itself. If you made out some simple relative PC addressing that will demonstrate what is happening.

Answer 3

While there are 4,294,967,296 [2 ^ 32] memories, the actual data bus is only 8 bits wide.

For 16-bit instructions, you need 2 memory accesses to load instructions: what is where the "Endian" arguments begin. Whichever way you order it, 2 bytes are read with the 1st byte at the address ending in 0.

[sigh] If the ARM data bus was 16 [or 32] bits wide, you could forget about the bits on the PC and have a double [or four] command space.