How to replace string and add prefix or suffix in Microsoft NMake?

I translated the GNU Make makefile into the Microsoft Visual Studio Makefile. I have three doubts:

1) How to replace a string. For example, in a folder containing:

namespace_type_function1.cpp namespace_type_function2.cpp namespace_type_function3.cpp 

I want to change the type to say the string "INT", so I finally get

 namespace_INT_function1.cpp namespace_INT_function2.cpp namespace_INT_function3.cpp 

2) How to add a prefix in the same way 3. How to add a suffix in the same way.

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2 answers

When you have a string in an environment variable or nmake internal variable, you can use the following command to replace one fixed string with another:

 $(MY_VAR:REPLACE_THIS=WITH_THIS) 

"WITH_THIS" may be an empty string.

Example makefile:

 MY_VAR=123451234512345 ALL: @echo $(MY_VAR:12=XX) @echo $(MY_VAR:12=) 

outputs:

 XX345XX345XX345 345345345 

In the Microsoft documentation:

Macrosubstitution is case sensitive and is literal; string1 and string2 cannot call macros. Replacement does not change the original definition. You can replace text in any predefined macro except $$@ .

No spaces or tabs precede the colon; any after a colon is interpreted as literal. If string2 is null, all occurrences of string1 are removed from the macro definition string.

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NMAKE does not contain much string processing, except substitution of a substring, and even this cannot perform macro distribution. However, since NMAKE supports the inclusion of makefile, there is an obvious technique that you can use, although its implementation is somewhat complicated.

The idea is to create a temporary makefile that, when included in a recursive call, performs another macro extension where necessary. This can be used to add variable prefixes, suffixes, or delimiters to line lists. Further expansion rounds can also be performed if necessary.

The following snippet illustrates the method. It converts the abcde list to [a];[b];[c];[d];[e] (that is, it adds a prefix, suffix, and separator between elements). The original makefile (the rules that will be executed if NMAKE supports the secondary extension) basically does not change. Finally, NMAKE does not leave temporary files after the entire run.

 # The name of the makefile. MAKEFILE = test.mak # The list of strings to be processed. The elements can be separated by one or more spaces or tabs. LIST = abcde # The prefix to add to each element. PREFIX = [ # The suffix to add to each element. SUFFIX = ] # The separator to add between each element. SEP = ; ##### # Replace tabs with spaces. # Note: there is a hard tab character between the colon and the equal sign. LIST = $(LIST: = ) !IFNDEF TEMPFILE # Write a temporary makefile. target1 target2: @$(MAKE) /nologo /C /$(MAKEFLAGS) /F$(MAKEFILE) TEMPFILE=<< $@ LIST = $(PREFIX)$$(LIST: =$(SUFFIX)$(SEP)$(PREFIX))$(SUFFIX) LIST = $$(LIST:$(PREFIX)$(SUFFIX)$(SEP)=) <<NOKEEP !ELSE # Here goes your original makefile. ! INCLUDE $(TEMPFILE) target1: @ echo.$@ @echo.$(LIST) target2: @ echo.$@ @echo.$(LIST) !ENDIF 

The only caveat to this is that command line macros are not passed to recursive calls and therefore are not so useful.

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Source: https://habr.com/ru/post/1498329/


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