I am trying to write an SVA statement for a handshake procedure.
In my searches, I found the following:
property p_handshake(clk,req,ack); @(posedge clk) req |=> !req [*1:max] ##0 ack; endproperty assert property(p_handshake(clock,valid,done));
However, my “ready” signal may occur many cycles after the actual cycle is high. How do you make this statement, make sure that the “done” statement is approved at any time after the valid statement, without a valid deletion?
source share