Why can't a single instruction contain two memory references in an assembly?

Question

I am new to assembler. I found out that the following instruction is invalid because it cannot have both a source and a destination - memory references. I want to know the reason.

movl (%eax) (%ebx) 

Answer 1

Instruction sets require bit patterns to be used to encode instructions. You could have bit patterns for every conceivable instruction, but then the processor would not be practical to build. Therefore, processor developers limit the variety (and therefore often style) of instructions to simplify the design of the processor.

A common theme in processor design is that instructions work in one register and one memory location. Two operands mean that this style can load memory for registration, store a register in memory, and many common binary operations, such as adding memory for registration, comparing a register into memory, etc. This topic in practice works so well that little is needed for instructions that work with several memory cells, and its regularity makes the "central" part of processor processing easier to implement. The specified movl instruction is suitable for this topic, so there is only one memory operand.

So, the real answer is that winning for such an instruction does not justify the technique.

Most processor designs have now been around for over 20 years, and transistors are now relatively cheap. As a result, instruction sets for almost all of these machines have become more complex, often including some instructions relating to several memory operands. But these instructions are an exception, not a rule.

Answer 2

There is no real reason - this is just a way of defining Intel's instruction set. There are several Intel instructions that use two memory references: movs , for example.

Answer 3

Some instructions must be quick; they cannot access all of the I / O ports for all the time. First you must first get the data into the register, because cpu is made this way. Then, through another port, you send data to another address.

To have more pipelining depth, some instructions may not even use the same register for source and destination. Using the same type of register or the same register or memory for the source and destination complicates the process of pipelining.

Example: a processor can copy from registers A ---> B when executing C ----> D. But it cannot do A -----> A and A ----- B at the same time. Even just reading the register makes it difficult to access it in the next instruction. Thus, it is most effective to use different things at the source and destination.

Using memory for both the source and destination makes this instruction highly dependent on something about memory and ports; it is inefficient. These can only be optimized instructions.

More stringent conveyor processing slows down critical parts.

As Ira Baxter says, all registers connected to all other registers (and doing the same for memory ports) make the CPU much larger and more difficult to produce.