I donβt know where to start :-)
This is a very, very simplified explanation, not entirely true since 286, but can help you understand the basic concepts:
Memory addressing is done via the address bus: the 32-bit address bus can express 2 ^ 32 different addresses. The smallest amount of memory manipulated in one operation is called the size of the "word", which is limited by the width of the data bus.
The maximum amount of address memory is the size of a word times the number of addresses.
In "block IO" operations, the equivalent of the word size is the block size, usually much larger. This is a compromise: larger data can be accessed with the same address length, but to drag a single bit, you need to rewrite the entire block.
The big difference is that the address does not have to be present simultaneously on the "address bus", as in memory: commands (and responses) are transmitted in sequential "packets", for example, on the network. Thus, there is no hardware limitation on the size of the address, although I am sure that the protocol indicates a reasonable upper bound.
As you can see, the address size of the disk is not completely related to the width of the CPU bus and the size of the register.
source share