VHDL / Verilog: HDMI Port Access

Question

I just got a new board.

http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,836&Prod=ATLYS

As you can see, I have two HDMI inputs and two HDMI outputs on the board.

I want to make one HDMI input and do some conversion on a 1080p signal. In particular, I want to make the pixels in the center of the screen a little less bright, and the pixels on the edge of the screen are much brighter. This new signal is then output to one of the HDMI output ports.

I really don't know how to do this - I am very new to FPGA design.

Do I need to get an IP address, or can I do it myself using standard tools? I have a Xilinx ISE web package.

Any insight is greatly appreciated,

Answer 1

You usually have two options:
1) You can implement your own HDMI receiver / transmitter modules in HDL of your choice. But for your purpose, this seems too laborious and too crowded, because all you want to do is “change some pixel values”.
I would also not recommend this to beginners in the HDL / FPGA area.
The HDMI specification is also not available for free, as far as I know, so this is probably not the cheapest solution.
2) Use an existing IP core. Have you checked the “Support Documents” at the bottom of the Digilent page (link in your question)? There seems to be a reference design that " accepts an HDMI input, buffers the input frames into memory, and then outputs the buffer to another HDMI port. "
If you have the necessary license to use the EDK (Embedded Development Kit), this reference design should contain exactly what you are looking for.
But even if you need a clean HDL solution, look at the HDL source files that come with the EDK solution will not hurt.
A full EDK license is also worth it, but you can get a free 30-day Xilinx evaluation license.

Finally, many free IP cores are available on the Internet, for example. on OpenCores.org .

edit: I just found this entry in the Xilinx forum Understanding DVI / HDMI and Atlys , possibly covering some of the problems you encounter /,