Yes, the idle circuit still consumes energy. He does not consume as much, but he still consumes some. The reason for this is how transistors work, and how CMOS logic consumes energy.
Classically, CMOS logic (type on all modern chips) consumes energy only when switching state. This is achieved by very low power compared to the technologies that came before it, which consumed energy all the time. However, every time a beat front occurs, some logical changes change, even if there is no work. The higher the clock frequency, the more energy is used. GPUs typically have high clock speeds, so they can do a lot of work; FPGAs have low clock speeds. This is the first effect, but it can be mitigated if you do not synchronize circuits that do not work (called โclock strobeโ)
As the size of the transistors became smaller and smaller, the amount of energy used in the switch was reduced, but other effects (known as leakage) became more significant. Now we are at the point where the leakage power is very significant, and it is multiplied by the number of gates that you have in the design. Complex structures have high leakage power; Simple designs have low leakage power (in very simple conditions). This is the second effect.
Therefore, for a simple task, it might be more energy efficient to have a small, specialized, low-speed FPGA rather than a large integrated, but high-speed / general processor / GPU.
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