Omp flush and cc-numa

Question

there is something that i miss the cc-numa architecture and the need to reset variables. We all know that if two threads change the same cache line, the false exchange condition will increase in order to reload the cache lines again. So, why do we need to reset variables in order to receive information about the exchange of flows? Suppose in the serial area you declare:

int flag=0; 

And then in the parallel area, Thread 0 assigns a shared variable:

  flag=1; 

will be Thread 1:

 while (!flag){} 

does the loop end without a flush? If not, why, if we are in the cc-NUMA architecture?

Answer 1

Do not forget that the compiler can also perform optimizations that cause code violation above, not just the processor.

Therefore, I believe that flash is still necessary regardless of hardware support for cache coherency.