Initializing the Cortex-M3

Question

I wrote (IMO) almost the simplest ARM application, and it didn’t work :) What could be wrong? What is missing?

After writing flash and CPU reset, there is garbage in the registers.

Please be kind and if U know, tell me what needs to be done to start the simplest application on STM32F1.

Maybe someone will list what needs to be done before launching the application, that is.

• Initialize the stack (necessary?)
• Install something.
• Install something else.

Application:

@Directives .thumb @.code 16 .syntax unified .section .text .org 0 @ Alters location of pointer - in this case set to zero vectors: @ Define basic vectors for specific capabilities .word _start + 1 @ Set - start address and increment pointer .word _nmi_handler + 1 @ Below all other vectors will be declared: .word _hard_fault + 1 .word _memory_fault + 1 .word _bus_fault + 1 .word _usage_fault + 1 _start: mov r0, #5 mov r1, #4 add r2, r0, r1 _nmi_handler: _hard_fault: _memory_fault: _bus_fault: _usage_fault: 

Maybe someone knows any tutorials or books, linker scripts, processor initialization, etc.?

Processor: STM32F103VBT6

Programmed: OpenOCD.

Thanks in advance.

Answer 1

I have examples with a large number of fingers and cortex-m http://github.com/dwelch67

As Joachim pointed out, you did not specify the first entry in the vector table on the stack pointer. Cortex-m does not have the same vector table as the hand, which means the one loaded in hand mode with instructions with handles.

To fulfill the answer, although for cortex-m you can configure the stack by putting the initial value of the stack pointer in this place of the first word

 .cpu cortex-m3 .thumb .word 0x10008000 /* stack top address */ .word _start /* 1 Reset */ .word hang /* 2 NMI */ .word hang /* 3 HardFault */ .word hang /* 4 MemManage */ 

you can, of course, immediately start the stack pointer manually, as would be the case with manual mode or most other processors.

I would like your code to end up in an infinite loop, so as written, you do not fall into undefined instructions, etc. (there should be 0xFFs, which on cortex-m0 I consider undefined, on a -m3 or -m4 with armv7 thumb2 support, this can be a real instruction).

Note that I did not use +1 on my vectors. You need to know your tools. You need lsbit to set to point the thumb / thumb on the branch. Although I learned a lesson about this (you will need to find such a question)

Arm / Thumb: use BX in Thumb code, call a Thumb function, or jump to a Thumb instruction in another function

With the gnu assembler, if you put the .thumb_func directive in front of the label, that label is labeled as the thumb label, and the gnu tools will use the address | one.

 .thumb_func .globl _start _start: 

You need to assemble and disassemble from time to time to make sure that your table is correctly constructed, and branches, etc. use the correct address.

  0: 10008000 andne r8, r0, r0 4: 0000005b andeq r0, r0, fp, asr r0 8: 00000050 andeq r0, r0, r0, asr r0 c: 00000050 andeq r0, r0, r0, asr r0 10: 00000050 andeq r0, r0, r0, asr r0 

see, apparently, I have an error in one of my examples ... it never does anything except reset (without the interruptions used in the example, that's how I left with ignorance). forgot .thumb_func

 hang: b . 

is produced

 00000050 <hang>: 50: e7fe bn 50 <hang> 

change to

 .thumb_func hang: b . 

and the vector table goes into

 00000000 <hang-0x50>: 0: 10008000 andne r8, r0, r0 4: 0000005b andeq r0, r0, fp, asr r0 8: 00000051 andeq r0, r0, r1, asr r0 c: 00000051 andeq r0, r0, r1, asr r0 10: 00000051 andeq r0, r0, r1, asr r0 14: 00000051 andeq r0, r0, r1, asr r0 

it's interesting, change the code to

 .cpu cortex-m3 .thumb .word 0x10008000 /* stack top address */ .word _start+1 /* 1 Reset */ .word hang+1 /* 2 NMI */ .word hang+1 /* 3 HardFault */ .word hang /* 4 MemManage */ .word hang /* 5 BusFault */ 

and he really does nothing but one or one.

 00000000 <hang-0x50>: 0: 10008000 andne r8, r0, r0 4: 0000005b andeq r0, r0, fp, asr r0 8: 00000051 andeq r0, r0, r1, asr r0 c: 00000051 andeq r0, r0, r1, asr r0 10: 00000051 andeq r0, r0, r1, asr r0 

This is a little disturbing. On the bottom line, though, with two things, using cortex-m, you can set the stack pointer in the vector table, and secondly, when starting a new project, parse and analyze the vector table to make sure that this is what you expect. Esp, if he doesn't do what you think should.

Answer 2

From the M3 documentation ;

 The vector table at location 0 is only required to have four values: Stack top address Reset routine location NMI ISR location Hard Fault ISR location. 

The top address of the stack should be with address 0, it seems that you are missing.