Why work here?

Makefile:

KERNEL_DIR := /usr/src/linux-2.6.32.9 obj-m := try.o driver: try.c make -C $(KERNEL_DIR) SUBDIRS=`pwd` modules clean: rm -rf *.o *.ko *.mod.c 

When I type make , make -C $(KERNEL_DIR) SUBDIRS= pwd modules is executed, as if make driver is running, why?

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2 answers

make runs the first possible thing from the makefile if invoked without an argument. obj-m and KERNEL_DIR are not rules, they are variables. driver is the first rule.

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If make is invoked without specifying a target, make selects the first target in the makefile as the target. In this case, it is driver . obj-m and KERNEL_DIR are only variable assignments, not targets.

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Source: https://habr.com/ru/post/1344740/


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