Think tick-tick about grandfather or other pendulum clocks. In this case, the complete tick and tock cycle usually takes one second. And with the clock and the clock, we switched from gravity and / or spring with mechanical power to some kind of electrical electricity. Some crystals can be used in chains so that they create electrical vibrations. Digital electronics now uses crystals, and you can also get high speed and very accurate time. Thus, the clock in this case is the electrical output of this crystal oscillator, clock pulses of 10,000,000 Hz (or 10 MHz) mean that 10 million electrical ticks per second are per second. Put this in the AND, OR, and NOT logic, and you can run processors and peripherals.
Allows you to limit the discussion of processors or microcontrollers from the second to the older generation, where the processor, memory and everyone use the same clock. Thanks to this clock signal, which supplies digital logic, you can have logic that reads instructions from memory and executes these instructions at a specific derivative speed. Downloading a register with a value from memory (reading) can take 3 clock cycles, one clock cycle to extract instructions from memory, another clock cycle to decode and start executing this command, and since the instruction is a memory read and memory cannot do two things at once ( in this model), then this is the third clock cycle for reading from memory, then the next instruction is read and executed, and so on. Therefore, some processors change their execution time for these reasons, there is always a selection from memory and decoding and execution, and each of these steps takes one or more clock cycles. Some processor designs suggest using a fixed resolution of, say, 4 clock cycles for each instruction cycle, the longest executing instruction for this processor being 4 clock cycles, and some can take only one clock cycle.
Then things got better, and you hear the word conveyor, and you see an x86 ad that can execute one command per measure or a superscalar where it executes more than one instruction per cycle. this is a bit misleading. What the pipeline does is create an assembly line if you want. think about the factory TV show, how others made it. A machine that makes padlocks has many steps along the assembly line, each step performs one simple operation, draws the numbers on the dial, moves the dial to the shaft, inserts the dial plus the shaft into the device, etc. If everything that you looked at At the last stage, it would look like they were making one lock for each assembly line cycle, when it could have actually earned 30 hours for the lock. With processors in one cycle cycle, one member on the pipeline extracts an instruction from ram, the next memory decodes the previous instruction, the third executes two instructions back, etc. Therefore, when you hear a pipe or conveyor flushing, what is it, the conveyor has stopped, or should they stop the conveyor line and discard each element on the line and start a new one. traditionally, when you have a jump instruction, which means two or more commands immediately after it is not executed, you should clear the handset and start filling it again from the address where the branch is carrying.
If you have been long enough or read differently or read on Wikipedia, you will hear about the 486DX processor. This was the beginning of what is now extremely common. Until that time, a clock generator based on a quartz oscillator was built into the processor, you wanted to start your processor with a frequency of 16 MHz, you set a 16-MHz clock. A few problems, one of which was that the memory interfaces could not speed up, is a very simple solution - you can take these contacts on your processor and talk to the memory at a lower speed, say, your processor runs at a frequency of 16 MHz, which you You can run the memory at 8 MHz, creating a new clock that is half the speed of the main clock. Thus, from the tick-to-tick-tick mark of 16 MHz, you only change the memory output to ticks. Thus, the first internal tick ticks the memory bus clock, the first output, no changes to the memory output, the second tick that you apply to the memory bus clock, the third tick the tick on the memory, the fourth tick the mark on the memory bus and so on. The real problem arose when I / O itself, all the pins on the processor could not work at the clock frequency with which the transistors inside could work. Thus, with 486DX, what they were doing took a 25 MHz clock, and using some analog magic rotation, which clocked at 50 MHz inside the part, the edge of the part, memory and other buses worked at 25 MHz or slower, but the processor , therefore, since you could feed the instruction quickly enough (this leads to talk about caches), the conveyor at a frequency of 50 MHz will work. In lines without stalls or flushing, which will be 50 million instructions per second. Creating a stable 2x multiplier at the time was tricky. but today it is relatively trivial. Modern processors with several giants do not use a gigahertz clock, they often use a clock of about 100 MHz and scale them to several gigahertz for processor cores, then you can hear about 800 MHz of DDR or 1066 MHz or 1333 memory, etc. The same goes for a 100 MHz clock link is multiplied to create these speeds for the memory bus.
Thus, in modern computers, as in the old days, you still use crystal-based generators as a source of synchronization, the magic of nature, from the fact that you create many different speed clocks for the processor and peripherals around the computer. For example, you can use different clock speeds for USB and FireWire interfaces and hard drives (ide / sata), etc.
I saw your other questions about PIC programming, for example, PIC, is in this traditional type of mode, where everything comes from a single clock cycle with a single clock frequency, and if you look at one of my answers there, you can see the count of the "clock" cycles and count them using units of cycles. Once this is done, you can apply a unit of time to it to multiply or divide, since it can be with a clock frequency of 4 MHz or 1 MHz, etc. In the same section of code, 100 cycles can be executed, and a processor with a clock frequency of 4 MHz will follow these 100 instructions 4 times faster than if you were using a 1 MHz generator. As drichsh suggested, it is almost linear, at least for simple cases like this. For modern computers, if you read data from the same hard drive with the same code, a 3-processor processor is not 3 times faster than a 1 GHz processor, because the speed of the hard drive is as slow as the processor 3ghz and 1ghz processor are stalled waiting for data from the hard drive. You can have a taxi that is a ferrari, but if you live in a city with older, slower people that are 1 mile and wide, your ferrari will be parked most of the time when it loads and unloads passengers, rather than accelerating a few hundred yards. A minibus would actually be faster than a Ferrari (people entering and leaving a bottleneck).