GNU make variables in makefile

Question

I would like to create a Makefile that also creates a simple script to run a compiled application.

I have something like the following:

@touch $(SCRIPT) @echo LD_LIBRARY_PATH=$(LIB_DIR) $(APP_DIR)/$(APP) $1 $2 $3 $4 $5 $6 > $(SCRIPT) @chmod +x $(SCRIPT) @echo Script successfully created. 

And I want $ 1 $ 2 ... to appear in the script just like $ 1 $ 2 ... to represent script command line arguments. I can't get it to work because the Makefile uses $ 1 $ 2 as its own variables. How can i do this?

Answer 1

Use the double dollar sign to say that you mean literal $ , not variable expansion, and a single quote all this to prevent further expansion of the shell when echoed:

 @echo 'LD_LIBRARY_PATH=$(LIB_DIR) $(APP_DIR)/$(APP) $$1 $$2 $$3 $$4 $$5 $$6' 

Answer 2

Run $ by doubling it:

 @echo LD_LIBRARY_PATH=$(LIB_DIR) $(APP_DIR)/$(APP) $$1 $$2 $$3 $$4 $$5 $$6 > $(SCRIPT) 

If you have a secondary extension activated (don't worry - you probably havent!), You need to double the $ value again, resulting in, for example, $$$$1 .

By the way, the @touch command is redundant.