Make, inherit rules in the Makefile subdirectory

Question

I want to create a Makefile system in my project directories so that rules defined in one are defined in others. Say, for example, I have a directory called "test" and inside "test.c", but I want to build test.c using the rule defined in the Makefile in the root directory

Here is an example

#Makefile (inside base dir) %.o: %.c gcc -Wall -c $^ all: make -C test out.a #test/Makefile out.a: test.o ar rcs $@ $^ #test/test.c int main() { return 0; } #inside root dir $make make -C test make[1]: Entering directory `test' cc -c -o test.o test.c /usr/ucb/cc: language optional software package not installed make[1]: *** [test.o] Error 1 make[1]: Leaving directory `test' make: *** [all] Error 2 

Notice how it calls cc instead of my rule using gcc defined in the root makefile.

In general, I do not want to define the same rule in every makefile

Answer 1

For Microsoft nmake, use this:

 !INCLUDE ..\makefile.defs 

(it is assumed that makefile.defs in the parent directory contains basic rules)

For Gnu make use this:

 include ../makefile.defs 

see http://www.gnu.org/software/automake/manual/make/Include.html

Answer 2

You can include one makefile in another.