Multifile file for the project

Question

This is what my directory looks like:

/project makefile /ceda_lib makefile files.... /general makefile files.... /CLI makefile files.... /objects files.o 

Make file (main):

 1 #start other makefiles 2 3 4 o= ./objects 5 DEPS= Affine.hpp CEDA.hpp generalParameters.hpp generalFunctions.hpp 6 OBJ= $o/main.o $o/Affine.o $o/generalFunctions.o 7 CC=g++ 8 CFLAGS= -Wall -g -I. 9 export CC 10 export CFLAGS 11 export DEPS 12 13 all: 14 ▸---+$(MAKE) -C general 15 ▸---+$(MAKE) -C ceda_lib 16 ▸---+$(MAKE) -C CLI 17 18 run: $(OBJ) $(DEPS) 19 ▸---$(CC) -o $@ $^ 

Other makefiles look like this: (update2)

  1 include ../makefile.variables 2 3 OBJ = main.o 4 all: $(OBJ) 5 6 $(OBJ): %.o: %.cpp $(DEPS) 7 ▸---$(CC) -o ../objects/ $@ -c $< $(CFLAGS) 

I want all code from 3 directories to be compiled and all objects should be stored in the / object directory. Then the executable will be created from $ DEPS and the contents of the directory / object.

This make file does not work with sadness. Could you find what I did wrong, and also you could offer me ways to improve the code. (I'm new to makefiles).

Also this is the result whenever I try to make a project: (Update2)

 make: Entering directory '/home/george/Documents/CEDA' make -C general make[1]: Entering directory '/home/george/Documents/CEDA/general' g++ -o ../objects/generalFunctions.o -c generalFunctions.cpp -Wall -g -I. make[1]: Leaving directory '/home/george/Documents/CEDA/general' make -C ceda_lib make[1]: Entering directory '/home/george/Documents/CEDA/ceda_lib' g++ -o ../objects/Affine.o -c Affine.cpp -Wall -g -I. Affine.cpp:4:33: fatal error: generalParameters.hpp: No such file or directory #include "generalParameters.hpp" ^ compilation terminated. makefile:7: recipe for target 'Affine.o' failed make[1]: *** [Affine.o] Error 1 make[1]: Leaving directory '/home/george/Documents/CEDA/ceda_lib' makefile:8: recipe for target 'All' failed make: *** [All] Error 2 make: Leaving directory '/home/george/Documents/CEDA' 

This is makefile.variables

  1 #variables used by all makefiles in project directory 2 3 PATH_TO_DIR = ~/Documents/CEDA 4 c = $(PATH_TO_DIR)/ceda_lib 5 g = $(PATH_TO_DIR)/general 6 e = $(PATH_TO_DIR)/CLI #e for executable 7 8 DEPS= $c/Affine.hpp $c/CEDA.hpp $g/generalParameters.hpp $g/generalFunctions.hpp 9 CC=g++ 10 CFLAGS= -Wall -g -I. 

Answer 1

Here:

 OBJ= main.o ../objects/%.o: %.cpp $(DEPS) $(CC) -c $< $(CFLAGS) 

This makefile contains one rule, which is a template rule, a way to create any file with a name like ../objects/foo.o . But he does not tell Make which object file he should build. To be precise, a template rule cannot be the default rule.

The easiest way to fix this is to add a regular rule:

 ../objects/$(OBJ): 

Once you have this work, you will have object files, but there are still problems in the main makefile. The run rule will not create an executable file, and if you want to execute this rule, you will have to call it on the command line, it will not automatically follow.

You are trying to use the recursive use of Make - which is difficult before you master the basics. I suggest you try using the makefile to create the object files, and then try to create the executable using the command line, and then carefully look at the command you used and rewrite the run rule.

Once you achieve this, other improvements are possible. (Make is a powerful tool, but it has a long learning curve.)

EDIT: If it doesn't work at all, try something simpler first.

Select the source file in ceda_lib , for example, I do not know main.cpp . Make sure that the source file exists and that the corresponding object file ( main.o ) is not working. Edit the makefile (in ceda_lib/ ):

 main.o: main.cpp $(CC) -c $< $(CFLAGS) 

Then in ceda_lib/ try make and see what happens.

If it builds main.o , remove main.o and then from project/ try make -C ceda_lib and see what happens. If this ceda_lib/main.o , then we can move on to more advanced makefiles.