Can the instruction be in two addressing modes at the same time?

Question

In the book "Programming from scratch" I read the following:

Processors have several different ways to access data, known as addressing. The simplest mode is the immediate mode, in which the access data is embedded in the actual instruction. For example, if we want to initialize the register to 0, instead of the computer, the address to read 0 from, we would specify mode and give it the number 0.

In the addressing mode, the instruction contains register for access, and not to the memory location. The remainder of the modes will deal with addresses.

Does this mean that, for example, the instruction mov eax, 123 works both in immediate mode and in address registration mode?

Answer 1

This is not the whole command that has a specific addressing mode, each operand individually. In the mov eax, 123 example mov eax, 123 you have to say that the source is an immediate operand and the receiver is a register.

Or you could say that the machine code for this command would use mov r, imm32 encoding mov if you want to talk about the form that the whole instruction takes. (There is also a form mov r/m, imm32 mov , but it is longer, so a good assembler will only select this if the destination is memory).

However, if one of the operands is a register, you can say for convenience and brevity that "the command uses the addressing mode [base+index] " if you want. But in fact, this is the memory operand that you are talking about, not quite the whole instruction. Especially if you are case sensitive and immediately as "addressing modes", even if it does not have a memory address.

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Also, usually when people say “addressing mode”, they talk about the memory address. Technically, in x86, most instructions have one register and one register / memory operand, so the difference between add eax, ecx and add eax, [ecx] is only 1 bit in the mod/rm byte (which follows the opcode).

Some instructions have two memory operands. For example, push qword [rdi + rax*8] explicitly loaded from [rdi + rax*8] and implicitly saved to [rsp] . Another example is the string commands movs and cmps , which implicitly use [rdi] and [rsi] .

But no command has two common r / m operands that allow you to use an arbitrary choice of normal addressing modes . Thus, an x86 instruction has at most one mod / rm byte.

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He discusses whether the immediate operand should be called the “addressing mode”, because the data does not occur anywhere. This is part of the manual. In addition, the immediate operand operation form has a different operation code from reg, reg / mem form.

Also note that most entire instructions that may have a memory source or memory have two opcodes: one for op r/m, r and one for op r, r/m . (For example, see the manual ref entry for and and other document references in the x86 tag wiki.) In any case, and eax, ecx can be encoded with either of the two operation codes, even before assembly. The choice does not affect performance.

Answer 2

Processors have several different ways to access data called addressing modes.

This sentence is about "processors" in general, and not about a specific type of processor.

I think this is too generalized because you will always find an exception for such suggestions. Indeed, if you look at modern processors, you will find more exceptions than processors that follow this rule.

Indeed, for "simple" processors, such as 6800 or 6502, the instruction itself has one addressing mode:

 lda $3A 

... for example, uses the "zero page" or "direct" addressing mode.

Other processors really definitely had two different addressing modes in the same instruction. For example, the instruction "move" 68000:

 move.w ($123).w, (a3, $4567) 

For x86 CPU it is even harder to say:

In 6800, a command that can be compared with mov al, bl is called tba (without arguments), and mov al, [0x123] is lda $123 .

So, you could argue that mov al, bl is an instruction without an argument (the addressing mode is implied - since the instruction is written as movblal without any operands to other CPUs), and mov al, [0x123] is an instruction with one address argument memory (absolute addressing mode - because the command is written as ldal 0x123 with one operand to other CPUs).

(The only instructions from the original 8086 that don't let you argue seem to be those with address modes m8, imm8 and m16, imm16 , such as mov word ptr [123], 567 or add byte ptr [123], 45 )

Of course, you can also claim that the mov instruction and that al and bl are two arguments to the mov al, bl command.

Thus, it depends on your argument if the command mov al, bl is an instruction with the addressing mode "implied" (= without operands) or "register for registration".