Change the priority level of the interrupt handler?

Question

I am trying to implement the following pseudo code on a cortex-m3 controller (specifically STM32L151)

void SysTick_Handler() { do_high_priority_periodic_tasks(); // not to be interrupted lower_interrupt_priority(); do_low_priority_periodic_tasks(); // these may be interrupted } 

In other words, run the first part with priority level 0, then somehow remove the current interrupt priority to 15 so that the rest can be replaced by other hardware interrupts.

One idea is to move do_low_priority_periodic_tasks(); into a separate interrupt handler and call this handler via NVIC_SetPendingIRQ() , which sets the waiting bit in the register NVIC->ISPR[] . Thus, another interrupt will immediately follow SysTick , if only something with a priority between 0 and 14. Expected.

 #define LOWPRIO_IRQn 55 void IRQ55_Handler() { do_low_priority_periodic_tasks(); // these may be interrupted } void SysTick_Handler() { do_high_priority_periodic_tasks(); // not to be interrupted NVIC_SetPendingIRQ(LOWPRIO_IRQ); } void main() { HAL_Init(); HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); HAL_NVIC_SetPriority(LOWPRIO_IRQn, 15, 0); HAL_NVIC_EnableIRQ(LOWPRIO_IRQn); while(1) { /* main loop */ } } 

I chose IRQ 55 because it was not busy on my controller, it would be an AES interrupt handler on STM32L162, but I am a little worried there. Should I choose a different IRQ instead, perhaps an unused DMA channel interrupt? Is it possible to use interrupt 57-67, which are defined in the core of Cortex-M3, but not in the STM32L series? Is there a better way to do this?

Answer 1

Is it possible to use interrupt 57-67, which are defined in the core of Cortex-M3, but not in the STM32L series?

No. Your NVIC may not implement them.

But PendSV is precisely created for this task:

 void SysTick_Handler() { do_high_priority_periodic_tasks(); // not to be interrupted // Set the PENDSVSET to trigger a PendSV exception SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk; } void PendSV_Handler() { do_low_priority_periodic_tasks(); // these may be interrupted } 

See also the answer about PendSV.