What is the difference between chisel and lava and CLaSH?

Question

I studied the sources of Chisel, as well as various lavas (Kansas, Chalmers and Xilinx flavors) and CLaSH. I am trying to understand what are the main selling points of Buns against others. The main one that I defined is quick modeling.

I was wondering if the people who studied in more detail could indicate other advantages, disadvantages, and trade-offs.

(Sorry if this is too much to discuss. I tried sending messages to users of the chisel, but apparently you should be accepted as a member for this.)

Answer 1

Firstly, the disclaimer that I am a heavy user of Chisel, but only have an introduction to the Haskell-based DSEL that you mention.

I think that Chisel's ability to target multiple backends (C ++, Verilog, etc.) is a significant advantage. Generated C ++ allows for cyclic modeling many times over compared to Verilog / VHDL simulations because it avoids the event-driven model inherent in these languages.

This is not an internal limitation, but Lava and CLaSH seem to be mostly focused on FPGA implementation, and Chisel is used to work with both FPGA and ASIC. The bit may also be slightly better supported; code, instructions, and examples are all available on GitHub , and the language remains under active development.

There are also differences between Haskell and Scala (parent languages); if you are more comfortable in one or the other, this can make it easier to get started. (I will leave the "language wars" to the experts.)