Makefile Organizes Library Dependencies

Question

When creating a library with recursive dependencies, I have this snippet:

$(LIBRARY) : $(OBJECTS) | $(LIBDIR) # objects is all the obj/*.o $(AR) ... obj/%.o : %.cpp obj/%.d $(CC) ... build : $(DEPENDENCIES) $(LIBRARY) $(DEPENDENCIES): $(MAKE) -C $(ROOT)/ $@ 

This works if I run make . Everything is built as expected, in the correct order. But if I run make -jN , the libraries are built in a bad order, because in fact I don’t have any rules for ordering dependencies, which leads to a lot of undefined references.

If I add a rule:

 $(OBJECTS) : $(DEPENDENCIES) 

then make make rebuilds each library every time, regardless of changes ( DEPENDENCIES is fake, but I don’t understand why it actually rebuilds everything). How can I ensure proper sequencing for parallel assembly purposes without reinstalling every time?

Answer 1

I will give you general guidelines for customizing makefiles to ensure:

a. rebuild this and only what is needed, and

b. work correctly with parallelism.

Some people have already asked for “good principles,” so here they are.

Rewrite your makefile with these principles, and you are guaranteed to work correctly.

10 commandments:

• You must invoke make to create the target (or targets) or the default target, which is the first target of your Makefile. The goals in your Makefile are to the left of :

• There are two types of goals: real and false. The real goal is the actual file (or directory) that you want to (re) create. The fake target is an abstract concept, not a real file, but it is usually a group of real files.

• The target specified in the Makefile may also have % , in which case it is the target of the template, which may correspond to several goals, real or false.

• Sources are files that are not listed as targets and already exist before calling make .

• The goal “depends” on the “preconditions” that are written after : after the goal

• The real target should have a “recipe”, which is the shell of the script under the target line. A recipe should write only one file and only one file, the target file. The destination file must be specified as $@ inside the recipe.

  If a recipe writes several files, divide it into several recipes for individual purposes.

  A lot of files can be read in a recipe: they must be indicated as preconditions.

• A false target should not have a recipe.

• A fake goal may depend on other fake goals, real goals, or sources. The real goal should depend only on real goals or sources. Everything ultimately (recursively) depends only on the sources.

• You will not call make recursively in recipes, with the exception of one case and only one case: you have some kind of subdirectory that is completely built on its own, without reading any of your sources or goals outside of itself.
  In this exceptional case, you will have a fake target file and recipe:

.PHONY: subdirectory subdirectory: $(MAKE) -C $@

10. If you want to use other makefiles, but do not satisfy the above exception, include them.

Note. I am not saying that you cannot write the correct Makefile in violation of these principles. You can and sometimes it is necessary. But for this you need to know what you are doing and understand more complex concepts. You should not start learning this way, but first start writing a Makefile following the principles above.